1. Field of the Invention
This invention relates to a control technique for the peak luminance level in a display panel, and more particularly to a light emitting period setting method, a driving method for a display panel, a driving method for a backlight, a light emitting period setting apparatus, a semiconductor device, a display panel and an electronic apparatus.
2. Description of the Related Art
In recent years, development of a display apparatus of the self-luminous type wherein a plurality of organic EL (Electro Luminescence) elements are arranged in rows and columns has proceeded. A display panel which uses organic EL elements also called organic EL panel has superior characteristics that reduction in weight and thickness thereof is easy and that it has a high response speed and is superior in dynamic image picture display characteristic.
Incidentally, driving methods for an organic EL panel are divided into a passive matrix type and an active matrix type. Recently, development of a display panel of the active matrix type wherein an active element in the form of a thin film transistor and a capacitor are arranged for each pixel circuit is proceeding energetically.
FIG. 1 shows an example of a configuration of an organic EL panel ready for a variation function of the light emitting period. Referring to FIG. 1, the organic EL panel 1 shown includes a pixel array section 3, a first control line driving section 5 configured to drive writing control lines WSL, a second control line driving section 7 configured to drive light emitting control lines LSL, and a signal line driving section 9 configured to drive signal lines DTL, arranged on a glass substrate.
The pixel array section 3 has a matrix structure wherein sub pixels 11 of minimum units in a light emitting region are arranged in M rows×N columns. Each of the sub pixels 11 here corresponds, for example, to an R pixel, a G pixel and a B pixel which correspond to three primary colors which form a white unit. The values of M and N depend upon the display resolution in the vertical direction and the display resolution in the horizontal direction.
FIG. 2 shows an example of a pixel circuit of a sub pixel 11 ready for active matrix driving. It is to be noted that many various circuit configurations have been proposed for a pixel circuit of the type described, and FIG. 2 shows a comparatively simpler one of the circuit configurations.
Referring to FIG. 2, the pixel circuit includes a thin film transistor (hereinafter referred to as sampling transistor) T1 for controlling a sampling operation, another thin film transistor (hereinafter referred to as driving transistor) T2 for controlling a supplying operation of driving current, a further thin film transistor (hereinafter referred to as light emitting control transistor) T3 for controlling emission/no-emission of light, a storage capacitor Cs, and an organic EL element OLED (Organic Light-Emitting Diode).
In the pixel circuit of FIG. 2, each of the sampling transistor T1 and the light emitting control transistor T3 is formed from an N-channel MOS transistor, and the driving transistor T2 is formed from a P-channel MOS transistor. At the present point of time, this configuration is possible where a polycrystalline silicon process can be utilized.
It is to be noted that the operation state of the sampling transistor T1 is controlled by the writing control line WSL connected to the gate electrode of the sampling transistor T1. When the sampling transistor T1 is in an on state, a signal potential Vsig corresponding to pixel data is written into the storage capacitor Cs through the signal line DTL. The storage capacitor Cs retains the signal potential Vsig written therein for a period of one field.
The storage capacitor Cs is a capacitive load connected to the gate electrode and the source electrode of the driving transistor T2. Accordingly, the signal potential Vsig stored in the storage capacitor Cs provides a gate-source voltage Vgs of the driving transistor T2, and signal current Isig which corresponds to this gate-source voltage Vgs is written from a current supplying line and supplied to the organic EL element OLED.
It is to be noted that, as the signal current Isig increases, the current flowing to the organic EL element OLED increases and the emission light luminance increases. In other words, a gradation is implemented by the magnitude of the signal current Isig. As long as the supply of the signal current Isig continues, a light emitting state of the organic EL element OLED in a predetermined luminance continues.
However, in the pixel circuit shown in FIG. 2, the light emitting control transistor T3 is connected in series to a supplying path of the signal current Isig. In the circuit configuration of FIG. 2, the light emitting control transistor T3 is connected between the driving transistor T2 and the anode electrode of the organic EL element OLED.
Accordingly, supply and stop of the signal current Isig to the organic EL element OLED are controlled by a switching operation of the light emitting control transistor T3. In particular, the organic EL element OLED emits light only within a period within which the light emitting control transistor T3 is on (the period is hereinafter referred to as “light emitting period”), but emits no light within another period within which the light emitting control transistor T3 is off (the period is hereinafter referred to as “no-light emitting period”).
This driving operation can be implemented also by some other pixel circuit. An example of a pixel circuit of the type described is shown in FIG. 3 for reference.
Referring to FIG. 3, the pixel circuit shown includes a sampling transistor T1, a driving transistor T2, a storage capacitor Cs and an organic EL element OLED.
The pixel circuit shown in FIG. 3 and that shown in FIG. 2 are different in presence or absence of the light emitting control transistor T3. In particular, the pixel circuit shown in FIG. 3 does not include the light emitting control transistor T3. Instead, in the pixel circuit shown in FIG. 3, supply and stop of the signal current Isig are controlled by binary value potential driving of the light emitting control line LSL.
More particularly, while the light emitting control line LSL is controlled to a high voltage VDD, the signal current Isig flows to the organic EL element OLED and the organic EL element OLED is controlled to a light emitting state. On the other hand, while the light emitting control line LSL is controlled to a low voltage VSS2 (<VSS1), supply of the signal current Isig to the organic EL element OLED is stopped and the organic EL element OLED is controlled to a no-light emitting state.
In this manner, the operation state of the pixel circuit is controlled through binary value driving of the writing control line WSL and the light emitting control line LSL.
FIGS. 4A to 4C and 5A to 5C illustrate relationships between the potential of the control lines and the operation state of the pixel circuit. It is to be noted that FIGS. 4A to 4C illustrate the relationship where the light emitting period is long while FIGS. 5A to 5C illustrate the relationship where the light emitting period is short.
Incidentally, FIGS. 4A and 5A illustrate the potential of the writing control line WSL, and FIGS. 4B and 5B illustrate the potential of the light emitting control line LSL. Further, FIGS. 4C and 5C illustrate an operation state of the pixel circuit.
As seen in FIGS. 4C and 5C, the light emitting period within a one-field period can be controlled through the light emitting control line LSL.
By combining the control technique for the light emitting period length with an organic EL panel, such various effects as described below can be anticipated.
First, even if the dynamic range of the signal potential Vsig is not varied, the peak luminance level can be adjusted. FIG. 6 illustrates a relationship between the light emitting period length occupying within a one-field period and the peak luminance level.
As a result, also where an input signal to the signal line driving section 9 is given in the form of a digital signal, the peak luminance level can be adjusted without reducing the gradation number of the input signal. Further, in the case of this driving technique, also where the input signal to the signal line driving section 9 is given in an analog form, the maximum amplitude of the input signal need not be reduced. Therefore, the noise resisting property can be enhanced. In this manner, the variation control of the light emitting period length is effective to adjustment of the peak luminance level while high picture quality is maintained.
The variation control of the light emitting period length is advantageous also in that, where the pixel circuit is of the current writing type, the writing current value can be increased to reduce the writing period.
Further, the variation control of the light emitting period length is effective to improve the picture quality of the moving picture image. This effect is described with reference to FIGS. 7 to 9. It is to be noted that the axis of abscissa indicates the position in the screen image and the axis of ordinate indicates the elapsed time. All of FIGS. 7 to 9 represent a movement of a line of sight when an emission line moves in the screen image.
FIG. 7 illustrates a display characteristic of a display apparatus of the hold type wherein the light emitting period is given by 100% of a one-field period represented by 1V in FIG. 7. A representative one of display apparatus of the type just described is a liquid crystal display apparatus.
FIG. 8 illustrates a display characteristic of a display apparatus of the impulse type wherein the light emitting period is sufficiently shorter than a one-field period. A representative one of display apparatus of the type just described is a CRT (Cathode Ray Tube) display apparatus.
FIG. 9 illustrates a display characteristic of a display apparatus of the hold type wherein the light emitting period is limited to 50% of a one-field period.
As can be recognized from comparison of FIGS. 7 to 9, where the light emitting period is 100% of a one-field period as in the case of FIG. 7, a phenomenon that, when a bright spot moves, the display width looks wider, that is, motion blur, is likely to be perceived.
On the other hand, where the light emitting period is sufficiently shorter than a one-field period as in the case of FIG. 8, also when a bright point moves, the display width remains small. In other words, motion blur is not perceived.
However, where the light emitting period is 50% of a one-field period as in the case of FIG. 9, although the display width upon movement of a bright point increases in comparison with that in the case of FIG. 8, the increase of the display width is smaller than that in the case of FIG. 7. Accordingly, motion blur is less likely to be perceived.
Generally it is known that, where the one-field period is given by 60 Hz, if the light emitting period is set longer than 75% of the one-field period, then the moving picture characteristic deteriorates significantly. Therefore, it is considered preferable to suppress the light emitting period to less than 50% of the one-field period.
Different examples of driving timings of a light emitting control line LSL where one light emitting period is included in a one-field period are illustrated in FIGS. 10 and 11. FIG. 10 illustrates an example of driving timings where the light emitting period within a one-field period is 50%, and FIG. 11 illustrates an example of driving timings where the light emitting period within a one-field period is 20%. FIGS. 10 and 11 illustrate the examples of driving timings where the phase relationship exhibits one cycle with 20 lines.
It is to be noted that the light emitting period corresponding to the sth horizontal line from the top of the pixel array section 3 can be represented by the following expression. It is to be noted that the rate of the light emitting period occupying in the one-field period T is represented by DUTY.
In this instance, a light emitting period and a no-light emitting period are given by the following expressions:Light Emitting Period:{(s−1)/m}·T<t<[{(s−1)/m}+DUTY]·T No-Light Emitting Period:[{(s−1)/m}+DUTY]·T<t<|[(s−1)/m]+1|·T where t satisfies the following period:{(s−1)/m}·T<t<[{(s−1)/m}+1]·T 
Related techniques are disclosed in published JP-T-2002-514320, Japanese Patent Laid-Open No. 2005-027028 and Japanese Patent Laid-Open No. 2006-215213.